An efficient implementation of high speed jpeg2000 encoder decoder

Rubriek: Textual/Printed/Reference Materials - Boek

Prijs: € 57.99

Rating: 0/5

☆

☆

☆

☆

☆

Verzending:
Uiterlijk 31 januari in huis

This book presents a complete and up-to-date description of an efficient FPGA implementation of high-speed JPEG2000 using formal design methodologies namely SpecC and A3, in a systematic and clear manner. JPEG2000 proposes a large set of advanced features for today's internet and multimedia applications. At the heart of JPEG2000 are two complex DSP algorithms: Discrete Wavelet Transform (DWT) and Embedded Block Coding with Optmized Truncation (EBCOT). Both algorithms are complex, compute intensive and very difficult to optimize in software implementation for real-time imaging and multimedia applications. A hardware implementation brings a solution to this complexity for real-time applications. This book proposes flexible and efficient architectures for DWT, matching arithmetic coder (MQ coder) and EBCOT units of the JPEG2000 system. The implemented parallel structure increases throughput off the Tier-1 (EBCOT and MQC) and DWT by factors of 301 and 164 cycles respectively. Execution results from software only and FPGA implemented JPEG2000 is compared and analyzed.

• 1 Bekijk alle specificaties

Oorspronkelijke releasedatum: 24 juni 2010

Aantal pagina's: 128

Hoofdauteur: Michael Yaw Appiah

Hoofduitgeverij: Lap Lambert Academic Publishing

Product breedte: 152 mm

Product hoogte: 8 mm

Product lengte: 229 mm

Verpakking breedte: 152 mm

Verpakking hoogte: 8 mm

Verpakking lengte: 229 mm

Verpakkingsgewicht: 200 g

EAN: 9783838334769

---